Various types of semiconductor diodes, such as varactor and Schottky diodes, are used in radio frequency (RF) circuits, including RF receivers. For efficient operation of the RF circuits, parasitic capacitance of the diodes must be minimized, particularly in devices having high frequency responses. For example, a diode formed on a silicon substrate over an active region includes metal layers for anode and cathode contacts and corresponding bond pads, respectively. In this configuration, capacitive coupling occurs between the metal layers and/or active regions of the diode. Generally, capacitive coupling may be reduced by increasing isolation between the various layers. Low levels of capacitance are desired in certain applications for diodes in RF circuits because RF circuits are negatively impacted by losses in the system. Thus, reduction of capacitance generally reduces signal and power loss.
A number of conventional methods used to reduce capacitance coupling in semiconductor diodes include additional fabrication steps, as well as increase process and fabrication costs and potentially impact other DC or RF performance parameters, while only marginally effecting capacitance. Conventional methods to create low capacitance diodes include use of air bridges, as described by Tan et. al., 120-GHz Long-Wavelength Low-Capacitance Photodetector with an Air-Bridged Coplanar Metal Waveguide, IEEE PHOTONICS TECHNOLOGY LETTERS, Vol. 7, No. 12, pp. 1477-1479 (December 1995), or mesas, as described by Bishop et. al., A Micron-Thickness, Planar Schottky Diode Chip for Terahertz Applications with Theoretical Minimum Parasitic Capacitance, IEEE MTT-S DIGEST, pp. 1305-1308 (1990), for example. The added costs of such methods can limit applicability in instances where manufacturing costs must be minimized, as in the case of packageless discrete diodes. In addition, structures such as mesas, which aid in capacitance reduction, planarization and scratch resistance can be an issue. One method to overcome these requirements is through planarization with a spin-on material or coating specifically designed for electronic device passivation.